True Random Number Generator Based on Fibonacci-Galois Ring Oscillators for FPGA

Random numbers are widely employed in cryptography and security applications. If the generation process is weak, whole chain of can be compromised: these weaknesses could exploited by an attacker to retrieve information, breaking even most robust implementation a cipher. Due their intrinsic close relationship with analogue parameters circuit, True Number Generators usually tailored on specific silicon technology not easily scalable programmable hardware, without affecting entropy. On other hand, hardware System Chip gaining large adoption rate, also critical application, where high quality random number mandatory. The work presented herein describes design validation digital Generator for cryptographically secure applications Field Programmable Gate Array. After preliminary study literature standards specifying requirements generation, flow illustrated, from specifications definition synthesis phase. Several solutions have been studied assess performances Array device, aim select highest performance architecture. proposed designs tested validated, employing official test suites released NIST standardization body, assessing independence place route randomness degree generated output. An architecture derived Fibonacci-Galois Ring Oscillator has selected synthesized Intel Stratix IV, supporting throughput up 400 Mbps. achieved entropy best configuration greater than 0.995.